MODULE 4
From Prototype to Production

The Electrified Backbone

Power conversion & energy storage — moving energy efficiently and holding it safely.
A FramtidR public-education series
The job
Mismatched Voltages Are the Whole Job
  • Nothing matches. 120/240 V mains, 400–800 V packs, 12 V accessories, 3.3 V logic.
  • What it means. Change and control energy with solid-state switches, while losing as little as possible.
  • Efficiency drives the system. Every watt lost turns into heat that sets size, cost, and reliability.
Voltage ladder~325 V mains peak800 V pack400 V pack48 V12 V5 V3.3 V1.0 V coreevery step is a converter
Original: each rung-to-rung step is a power converter.
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Part 1

Moving Energy

Switching conversion and the devices that switch fast.
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Linear
Burning Off Voltage as Heat
  • An LDO is a series variable resistor — it drops the extra voltage.
  • Pass-device loss: Ploss = (Vin − Vout) × Iload
  • Best-case efficiency: η ≈ Vout / Vin — limited by the ratio.
  • Example. 12 V → 5 V at 2 A loses (12−5)×2 = 14 W; a ~90% switcher loses only ≈1 W.
Vinpass device (rheostat)heatVoutloadηVout/Vin →η high only when Vout ≈ Vin
A linear regulator can only throw voltage away.
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Switching
Why Switching Beats Burning Off Heat
  • A switch loses power only when V and I are both nonzero. ON: V≈0 → P≈0. OFF: I≈0 → P≈0.
  • Chop, then filter. Make a square wave at fsw, then an L–C filter smooths it back to DC.
  • Duty cycle sets the average: D = ton / Tsw (0 ≤ D ≤ 1).
  • Real losses come from the short switching steps and from resistance while conducting.
node V(t)D·TV & Iswitching lossL–C filtersmooth DC
Loss appears only in the shaded transition lobes.
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Silicon
The Silicon Workhorses: MOSFET and IGBT
Silicon MOSFET
majority-carrier, fast
  • Leads at low/medium voltage (≤ ~200 V)
  • High switching frequency
  • Best for low-voltage DC/DC
Silicon IGBT
high current, slower
  • High voltage, low voltage drop when on
  • Switches slowly → lower frequency
  • Common in motor drives, inverters
Silicon's bandgap ≈ 1.1 eV sets the heat and field limits that wide-bandgap devices push past.
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Wide bandgap
Breaking Silicon's Limits with SiC and GaN
  • Bandgap: Si ≈ 1.1 eV, SiC ≈ 3.3 eV, GaN ≈ 3.4 eV → higher field and heat, lower loss.
  • SiC. ~650 V to 15 kV+, ~5–10× faster than IGBTs. Used in 800 V EV drives, grid.
  • GaN. Up to ~100+ V/ns, MHz-class, ≤ ~650 V. Used in chargers, data-center DC/DC.
  • Net effect. Higher fsw → smaller, lighter inductors and transformers.
voltage (10 V → 15 kV)fsw (10 kHz → 10 MHz)GaNSi MOSFETSiCSi IGBT
Original positioning chart: voltage vs switching frequency.
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Gate drive
Driving the Gate: Where Fast Switches Get Tricky
  • The driver makes the device. Fast edges need current to charge the gate: Igate ≈ Qg · fsw.
  • SiC. Higher, uneven drive (often +15…+18 V on, −3…−5 V off).
  • GaN is fragile. Narrow window (~+6 V; abs-max ~7 V) — too much kills the part.
  • dV/dt false turn-on. Sneaks in through Miller Cgd; stop it with negative off-bias and tight layout.
driverRgLloopGDSCgd (Miller)SiC: +18 / −4 VGaN: +6 V, tight clamp
Gate loop: driver → Rg → switch; parasitic L and Miller Cgd.
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Part 2

The Math That Makes It Predictable

Two conservation laws solve every basic converter.
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Steady state
Two Conservation Laws That Solve Every Converter
  • Steady state. In each period, every value comes back to where it started.
  • Inductor volt-second balance: average voltage across L over one period is zero → ∫ vL dt = 0 over Tsw.
  • Why. vL = L·(di/dt); leftover volt-seconds would push current up until the core saturates.
  • Capacitor charge balance: average current into C is zero → ∫ iC dt = 0 over Tsw.
vL(t)(Vin−Vout)·DTVout(1−D)Tequal areas canceliC(t)± halves equal
Areas above and below zero cancel each period.
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Buck
Stepping Down: The Buck Cell
  • Inductor voltage. (Vin − Vout) when ON; (−Vout) when OFF.
  • Volt-second balance: (Vin − Vout)·D + (−Vout)·(1−D) = 0
  • Ideal result: Vout = D · Vin — always a step-down (Vout ≤ Vin).
  • Current is continuous; output ripple filtered by the L–C.
VinSWLDVoutiLIloadD·T(1−D)·T
Buck schematic with triangular inductor current.
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Boost
Stepping Up: The Boost Cell
  • Charge then dump. L charges from Vin (ON), then dumps into the output via the diode (OFF).
  • Inductor voltage. Vin when ON; (Vin − Vout) when OFF.
  • Volt-second balance: Vin·D + (Vin − Vout)·(1−D) = 0
  • Ideal result: Vout = Vin / (1 − D) — always a step-up (Vout ≥ Vin).
VinLDSWVoutVout/VinidealrealD→1
Boost schematic; gain 1/(1−D) rises steeply, real curve peels off.
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Buck-boost
Up or Down, Polarity Flipped
  • Inverting buck-boost. Inductor sees Vin when ON and −Vout when OFF.
  • Volt-second balance → Vout = −Vin · D/(1 − D) — sign flipped; steps up or down.
  • CCM. Inductor current never reaches zero — the D-only ratios hold.
  • DCM. At light load the current hits zero each cycle; the gain then also depends on load and L.
VinSWDL−VoutCCMDCM
Inverting buck-boost; CCM rides above zero, DCM touches zero.
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Summary
The Converter Formula Summary
TopologyInductor balanceIdeal conversion ratio
Buck (step-down)(Vin−Vout)·D + (−Vout)(1−D) = 0Vout = D · Vin
Boost (step-up)Vin·D + (Vin−Vout)(1−D) = 0Vout = Vin / (1 − D)
Buck-boost (inverting)Vin·D + (−Vout)(1−D) = 0Vout = −Vin · D/(1 − D)
Both laws∫ vL dt = 0 over Tsw∫ iC dt = 0 over Tsw
Ratios assume ideal (lossless) CCM operation; real duty runs higher to cover small voltage drops.
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Modeling
From the Ideal Ratio to a Hot Board
Ideal formulas give voltage, not efficiency or temperature. For those, model the losses in SPICE / LTspice.
  • ✓Inductor winding (DCR) resistance + core loss
  • ✓Capacitor ESR (equivalent series resistance)
  • ✓Switch RDS(on) conduction loss + switching / gate loss
  • ✓Diode forward drop / body-diode loss
  • ✓Output real duty cycle, ripple, efficiency vs load, and a thermal budget
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Loss budget
The Loss Budget and the Power-Loss Pie
  • Add up every watt: Ploss = Pcond + Psw + Pmag + Pother
  • Conduction: Pcond ≈ Irms² · RDS(on) (and VF·Iavg in a diode).
  • Switching: Psw ≈ ½ · V · I · (ton+toff) · fsw (+ Pgate ≈ Qg·Vdrive·fsw).
  • Magnetic: copper (Irms²·Rdc) + core (hysteresis + eddy).
  • Trade-off: a higher fsw shrinks the magnetics but grows Psw — there is a best point.
  • Efficiency: η = Pout / (Pout + Ploss).
where the watts goconductionswitchinggate drivemagnetics (Cu)magnetics (core)cap ESR
Where the watts go in a typical switching converter.
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Magnetics
The Magnetics Nobody Warns You About
  • Biggest, heaviest, hottest part — and hardest to buy off the shelf in volume.
  • Saturation. Too much current makes L drop and the current spike. Size for Ipeak.
  • Loss split. Core loss rises with flux & frequency; copper loss with skin/proximity (use litz / planar).
  • Stored energy: E = ½ · L · I² — this sets a core volume you cannot avoid.
  • Transformers add Vsec/Vpri = Nsec/Npri, isolation, and leakage-inductance spikes.
BHknee: saturationL drops past kneecore (core loss)winding (copper loss)size for Ipeak; ½LI² sets the volume
B–H knee and a cutaway inductor: copper vs core loss.
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Thermal
Getting the Heat Out: Thermal Management
  • Every lost watt flows junction→ambient along a chain of thermal resistances.
  • Thermal Ohm's law: ΔT = P · Rθ; Tj = Tamb + P · Rθ(j-a).
  • Series chain: Rθ(j-a) = Rθ(j-c) + Rθ(c-s) + Rθ(s-a); TIM sets Rθ(c-s).
  • Ways to help. Bigger/finned heatsink, forced air, liquid cooling, more copper, spread the heat.
  • Leave margin. Max Tj is often ~150–175 °C for power Si/SiC — design with room at the worst-case ambient.
Tjjunction (heat)Rθ(j-c)Rθ(c-s) TIMRθ(s-a) sinkheat outambientTj = Tamb + P·Rθmore loss Por higher Rθraises Tj
Thermal-resistance ladder from junction to ambient.
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EMI / EMC
Quiet by Design: EMI, EMC, and Filtering
  • Fast edges radiate. The same dV/dt and di/dt that make switching efficient also make noise.
  • Two paths. Conducted EMI (back onto the mains/input) and radiated EMI (through air) — limited by CISPR / FCC Part 15.
  • Two modes. Common-mode → CM chokes; differential-mode → X/Y caps + differential inductors.
  • Layout is the first filter. Keep the switching-loop (“hot loop”) area small before adding any part.
  • Trade-offs. Spread-spectrum, snubbers, and slower edges give quieter noise but cost some efficiency.
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Part 3

Holding Energy Safely

Li-ion chemistry, the NMC/LFP trade, and thermal runaway.
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Intercalation
Energy Storage Starts with a Rocking Chair
  • Shuttling ions. A Li-ion cell stores energy by moving Li⁺ between two host lattices — intercalation (slotting in), not plating.
  • Discharge. Li⁺ leaves the graphite anode, crosses the electrolyte/separator, and slots into the metal-oxide cathode.
  • Separator vs electrolyte. The separator blocks electrons but lets ions through; the electrolyte is the path the ions travel.
  • Cathode chemistry sets voltage, capacity, cost, and safety.
graphite anodeSEIseparatormetal-oxide cathodeLi⁺ (discharge)e⁻
Cell cross-section: Li⁺ shuttles; electrons take the external path.
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Chemistry
Picking a Cathode: NMC versus LFP
NMC (Li-Ni-Mn-Co oxide)LFP (Li-iron-phosphate)
Cathode structureLayered oxideOlivine
Nominal cell voltage~3.6–3.7 V~3.2 V
Energy densityHigher (~150–220 Wh/kg)Lower (~90–160 Wh/kg)
Cycle life~1,000–2,000~2,000–5,000+
CobaltYes (cost, supply, ethics)None (Fe, P)
Thermal stabilityLower (decomposes earlier)Higher (strong P–O bonds)
Typical homeLong-range EVs, weight-criticalStationary storage, safety/cost-critical
Ranges, not single points — values vary by cell generation and format; verify against the specific datasheet.
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Failure
When a Cell Turns on Itself: Thermal Runaway
  • Fast charging stresses cells. Lithium plating, mechanical strain, local heating — wearing out life and raising risk.
  • A self-feeding chain once a trigger (overcharge, internal short, crush, overheat) starts it:
  • 1. SEI breakdown (~80–120 °C) → anode-electrolyte reaction.
  • 2. Separator melts (~130–160 °C) → internal short.
  • 3. Cathode decomposition releases oxygen → the electrolyte burns → temperature jumps.
Heat begets reaction begets heat — the loop must be broken by design, not luck.
~80–120 °CSEI breakdown~130–160 °Cseparator meltshighercathode O₂ releaseself-heating feedback
Temperature-ordered cascade with a self-heating feedback loop.
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Pack safety
Keeping a Pack Cool and Inside Its Safe Window
  • ✓Narrow band. Roughly 15–35 °C for best life; hot speeds aging/runaway, cold risks lithium plating.
  • ✓Uniformity matters. Take heat out and keep all cells at the same temperature — uneven temperature ages them unevenly.
  • ✓Cooling ladder. Passive → forced air → liquid cold plates → immersion; TIM bridges each cell.
  • ✓Stop it spreading. Spacing, ceramic/intumescent barriers, and vent paths keep one runaway cell from setting off the rest.
  • ✓Pack standards. UL 1973 (storage), UL 2580 (EV), UN 38.3 (transport), IEC 62619 (industrial cells).
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Part 4

Building & Certifying the Pack

Grading, welding, BMS, and the prototype-to-production gap.
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Pack build 1
Grading and Module Stacking
1
Cell test
OCV + internal resistance (IR/ACIR)
▶
2
Bin / sort
match cells so no weak cell drags the pack
▶
3
Adhesive + TIM
structural bond and a defined heat path
▶
4
Stack module
fixtured, repeatable, line-speed placement
Mismatched cells in a series string cause uneven aging and local overcharge — grading is a safety step.
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Pack build 2
Where a Weld Becomes a Safety Part
  • Laser-welded busbars (Cu/Al/Ni) to cell terminals — quick, reachable from one side, electrode-free, and able to bond different metals.
  • Safety-critical. A poor weld means high resistance → local I²R heating; micro-cracks start a hot spot → runaway.
  • Hard parts. Shiny aluminum, brittle Al-Cu intermetallics, spatter, cracking as the weld cools.
  • 100% weld inspection (resistance, vision, sometimes peel/CT sampling) is standard.
good weldbusbarterminalfully fusedlow resistancebad weldbusbarterminalgap + crack + voidhigh resistance → heat
Full fusion vs a cracked, high-resistance joint.
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Pack build 3
BMS, Sealing, and Final Test
1
BMS integration
sense V/T; estimate SOC/SOH; enforce limits; balance cells
▶
2
Thermal
module to cooling plate (liquid/air); TIM completes heat path
▶
3
Sealing
IP-rated enclosure; pressure/vent management
▶
4
EOL test
HiPot, capacity & IR, BMS comms, protection-trip
End-of-line test is the gate — nothing leaves the line unverified.
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FramtidR view
Prototype → Production: the real gap
Breadboard / labProduction power system
Loose wires, no shieldingEMI/EMC designed-in (filtering, layout, FCC/CISPR limits)
Heatsink “it felt warm”Thermal budgeted and validated across load/ambient
One unit, careful operatorManufacturable magnetics; repeatable, inspectable welds
No paperworkSafety certification (UL 62368-1, UL 1973, UN 38.3)
Works todayReliability over years, cycles, vibration, temperature
Trust the buildBMS validation + 100% end-of-line test
Design for production from day one — the hard problems are rarely in the schematic.
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Recap
Five Things to Carry Out the Door
  • Switching beats linear — an ideal switch never holds V and I at once; loss lives in transitions and resistance.
  • Device map. Si for cost/maturity, SiC for high-voltage/high-power, GaN for high-frequency/high-density.
  • Two laws, three ratios. ∫vL=0 and ∫iC=0 → Buck D·Vin, Boost Vin/(1−D), Buck-Boost −Vin·D/(1−D).
  • Li-ion = intercalation. NMC = energy density; LFP = safety/cost/cycle life; runaway is a self-heating chain to design out.
  • Production adds EMI, thermal, weld-quality, certification, BMS validation, and EOL test on a working schematic.
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Further Reading
Power conversion
  • MIT OCW 6.622 Power Electronics — ocw.mit.edu — CC BY-NC-SA
  • Four DC-DC Converters in Equilibrium — All About Circuits
  • Inverting Buck-Boost Power Stage (SLVA721) — Texas Instruments
  • Conducted EMI Specifications & Filtering (SLYY221) — Texas Instruments
Semiconductors
  • Si, SiC and GaN for Power Devices — Engineering.com
  • Difference Between GaN and SiC (TND6299) — onsemi / Digi-Key
  • Gate-Driver ICs for SiC and GaN — Texas Instruments
  • LDO Linear Regulators Rival Switchers — Analog Devices
Energy storage
  • LFP vs NMC technologies — ScienceDirect (J. Energy Storage)
  • Li-Ion Thermal Runaway Modeling & Diagnosis — MDPI Processes 10(6):1192
  • Power Inductor Saturation and Losses — Coilcraft / Würth
  • IC Package Thermal Metrics (JESD51, SPRA953) — JEDEC / TI
Battery mfg & standards
  • EV Battery Welding — E-Mobility Engineering
  • Laser welding busbar to 21700 cell — ScienceDirect (JMR&T)
  • What Is a BMS? — MathWorks
  • UL 1973 / UL 2580 / UN 38.3 / IEC 62619 — UL Solutions / IEC
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